Silicon Labs /Series1 /EFR32BG1P /EFR32BG1P333F256IM48 /CMU /LFBCLKSEL

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Interpret as LFBCLKSEL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)LFB

LFB=DISABLED

Description

Low Frequency B Clock Select Register

Fields

LFB

Clock Select for LFB

0 (DISABLED): LFBCLK is disabled

1 (LFRCO): LFRCO selected as LFBCLK

2 (LFXO): LFXO selected as LFBCLK

3 (HFCLKLE): HFCLK divided by two/four is selected as LFBCLK

4 (ULFRCO): ULFRCO selected as LFBCLK

Links

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